GLOBALFOUNDRIES Eng Integration & Yield in United States
Assist in tapeout workflow from design to silicon.
Ensure mask error-free from customer design to reticle build.
To be able to communicate with both internal and external customers.
Understand tapeout workflow from design to silicon.
Follow up with pre-tapeout preparations and maintain all related tapeout documentation (Generation Rules, Bias Table/Frame Table, etc) to ensure tapeout readiness
Perform and validate MEBES through jobview prior to maskwrite release.
Understand and fulfill customer requirements as part of tapeout implementation.
Monitor mask making process to ensure smooth delivery from maskshop.
Basic understanding on mask making process, and validate mask quality.
Manage overall tapeout and mask make schedule.
B.S. Degree in Electrical Engineering, Materials Science, or other relevant engineering or physical science discipline is required
Candidate with Semiconductor experience in a semiconductor fab is preferred
Good knowledge of semiconductor processing
Excellent verbal and written communication skills
Good team player
Experience with tapeout, with understanding of mask design services and data preparation, inline metrology, design knowledge, and/or OPC in a semiconductor fab or foundry.
Strong organization and detail-oriented with first-time quality output, ability to work effectively with all levels of Fab and Design-to-mask organizations
Experience in Unix/Linux environment including ability in scripting skills would also be a plus.
Title: Eng Integration & Yield
Requisition ID: 17003475